In this guide, we’re going to re-use the hardware setup from part 5 and turn the half-adder into a 1bit full adder. The only thing we’re going to change is the programming of the CPLD itself so I won’t discuss the hardware. If you need to rebuild it, you can re-visit the last part of this guide for a refresher.
The full adder works in a similar way to the half adder but it also has a carry-in input. This isn’t so useful when you’re only adding two bits together but if you’re linking several full-adders together, you need the carry-in connected to the carry-out of the previous adder.
By now, I’m sure I don’t need to mention that it’s time to open up the Quartus II software and start inputting the design.
Once thing I need to mention though, because we’re only building a single 1-bit adder, there will be no carry-in. We will need to connect the carry-in to ground. You can either do this by assigning a carry-in pin and then connecting it to ground with a jumper cable or the much simpler method would be to connect it to ground in the design entry stage. This is the method I’ll be using.
Here is the schematic entered into Quartus II. As you can see, I’ve removed the Carry-in pin and connected it straight to ground. If you’re using the same breadboard set up as the half adder, you will need to configure your pins in the same way. If not, you can choose any pins you wish.
The next step is to upload the design to your CPLD chip and turn it on. The visible results will be the same as the half-adder but the logic inside is obviously different.
In the next part of this guide, we will connect four of these 1-bit adders together to make a 4-bit binary adder so stay tuned.
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Other articles in this series can he found here.